Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. 雇佣 Verilog / VHDL Designers

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    36 份搜到的工作,货币单位为 USD
    need help in verilog stuff 6 天 left
    已验证

    i need some help which is related to verilog structure coding

    $16 (Avg Bid)
    $16 平均报价
    3 个竞标
    Verilog Alarm Clock 6 天 left
    已验证

    Design the control logic for an alarm clock (for simulation purposes 20ns simulation = 1 minute real time –this can be adjusted somewhat for simulation purposes). a) Use multiple input signals (alarm set input, the snooze, and the alarm time). b) The design will contain one output (Alarm_On). A logic high at the output represents the alarm being “on”. c) An input will be used ...

    $83 (Avg Bid)
    $83 平均报价
    5 个竞标
    VLSI PROJECT -- 3 6 天 left
    已验证

    Comparison of CMOS, pseudo NMOS and transmission gate logic in terms of power-delay-area. Using cadence virtuoso using AMI 0.6um or TMSC 0.4um

    $140 (Avg Bid)
    $140 平均报价
    3 个竞标
    vivado expert needed -- 2 6 天 left
    已验证

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    $7 (Avg Bid)
    $7 平均报价
    1 个竞标
    vivado expert needed 6 天 left
    已验证

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    $4 / hr (Avg Bid)
    $4 / hr 平均报价
    2 个竞标
    Vhdl project -- 4 6 天 left
    已验证

    I need some clarification on vhdl

    $120 (Avg Bid)
    $120 平均报价
    10 个竞标

    Want someone who can quickly build an ARINC429 UVM UVC. Very low budget.

    $120 (Avg Bid)
    $120 平均报价
    2 个竞标
    VLSI project 6 天 left
    已验证

    about comparison of CMOS, pseudo NMOS and transmission gate logic in term of power delay area

    $85 (Avg Bid)
    $85 平均报价
    2 个竞标
    three-phase active rectifier 6 天 left
    已验证

    I already have three-phase diode rectifier and I want to make it to three-phase active rectifier on PLECS standalone.

    $79 (Avg Bid)
    $79 平均报价
    4 个竞标
    Digital Electronics 6 天 left
    已验证

    CMOS logic gates, digital circuit design using Verilog HDL and logic synthesis, clock distribution, digital circuit implementations and verification, digital memory and signalling technologies.

    $84 (Avg Bid)
    $84 平均报价
    10 个竞标
    Electrical Engineers Required 5 天 left
    已验证

    Hy, (10 engineers required) I am running a company, i have team of electrical engineers in different domains. Due to heavy work flow i need to extend my team so i need electrical engineers in different domains (electronic, power and communication). I need someone who can work with me for long term. Please bid if you are expert in your field. Please write 786 at the start of your proposal.

    $417 (Avg Bid)
    $417 平均报价
    22 个竞标

    More details will be shared via chat

    $67 (Avg Bid)
    $67 平均报价
    2 个竞标
    $78 平均报价
    2 个竞标
    $47 平均报价
    2 个竞标
    $22 平均报价
    5 个竞标

    Looking for Linux Kernel developers And FPGA developers to port the Mister Project Linux Kernel and U-Boot of DE10 Nano to the Xilinix Ultra96-V2 Zynq UltraScale+ ZU3EG. Once completed we need assistance porting of the existing FPGA cores of Mister Project to the zu3. Mister Project Linux Kernel: [登录来查看链接] Mister Project U-Boot: [登录来查看链接] [登录来查看链接]

    $575 (Avg Bid)
    $575 平均报价
    4 个竞标

    You have a VHDL code and you need to describe it. I would provide example

    $19 (Avg Bid)
    $19 平均报价
    6 个竞标

    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in VHDL , verilog, e.t.c, its quite urgent please, your help would be highly appreciated

    $131 (Avg Bid)
    $131 平均报价
    7 个竞标
    Vlsi sempile ptoject 4 天 left
    已验证

    I want 3bit cuonter is tow phases .phase 1 is Dane but I want phase 2 is layout in magic

    $18 (Avg Bid)
    $18 平均报价
    4 个竞标

    We need someone to help with some theoretic & programming questions in MPI Parallel C programming, including cost analysis, running time of the program, etc.

    $31 (Avg Bid)
    $31 平均报价
    1 个竞标

    Time-to-digital converters based on FPGAs.

    $35 / hr (Avg Bid)
    $35 / hr 平均报价
    8 个竞标

    Hi, this project will require you to use verilog and basys3 board and logic analyzer to do the work. Contact me if you are an expert in this.

    $56 (Avg Bid)
    $56 平均报价
    4 个竞标

    The booth multiplier circuit is from a research paper. I will give you the research paper.

    $20 (Avg Bid)
    $20 平均报价
    5 个竞标
    Scilab Software 2 天 left
    已验证

    I want someone who has knowledge in Scilab and can write in some codes

    $180 (Avg Bid)
    $180 平均报价
    8 个竞标
    design and verification 2 天 left
    已验证

    design of an FPGA device and its verification

    $111 (Avg Bid)
    $111 平均报价
    14 个竞标
    Verilog coding on FPGA's 2 天 left
    已验证

    I need an expert who can do implement modular multiplication algorithms in Verilog and simulate their results to make a comparison in their speed of implementation, hardware consumed etc.

    $336 (Avg Bid)
    $336 平均报价
    19 个竞标

    I'm required to design this architecture using VHDL. This architecture also consists of hops.

    $122 (Avg Bid)
    $122 平均报价
    7 个竞标
    Robotic Expert 20 小时 left
    已验证

    Hello freelancers, I am looking for an expert in VHDL/FPGA for an interesting project. The project is very small and I encourage new freelancers to place the bid. My budget is 30-40 AUD

    $52 (Avg Bid)
    $52 平均报价
    3 个竞标
    VHDL Expertss 20 小时 left
    已验证

    Hello freelancers, I am looking for an expert in VHDL for an interesting project. The project is very small and I encourage new freelancers to place the bid. My budget is 30-40 AUD

    $43 (Avg Bid)
    $43 平均报价
    6 个竞标
    Compiler Design 18 小时 left

    I need an expert on Compiler Design

    $500 (Avg Bid)
    $500 平均报价
    5 个竞标
    verilog, vhdl expert needed -- 3 18 小时 left
    已验证

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $3 / hr (Avg Bid)
    $3 / hr 平均报价
    7 个竞标
    verilog, vhdl expert needed -- 2 16 小时 left
    已验证

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $2 / hr (Avg Bid)
    $2 / hr 平均报价
    6 个竞标
    verilog, vhdl expert needed 15 小时 left
    已验证

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $40 (Avg Bid)
    $40 平均报价
    2 个竞标

    - Develop a micro-threaded RISC-V for low-overhead threading - Integrate with FPGA HLS tool to make a solution of micro-threaded HLS - Need to optimized PPA (Power Performance Area) - Require good problem solving skill - Require good written and oral communication kill

    $7289 (Avg Bid)
    $7289 平均报价
    3 个竞标

    In this project you will simulate Round Robin scheduling algorithm. For the sake of simulation, consider a simple system with a single CPU, single I/O device. The CPU has a ready queue and an I/O queue. The system will select a process from the ready queue based on RR algorithm (quantum time will be given to you) and send it to CPU. Information about a process is maintained in process control bloc...

    $27 (Avg Bid)
    $27 平均报价
    6 个竞标
    ASIC Verification Engineers 50 天 left
    已验证

    Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+) Essential requirements: Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar. Ability to update testbench components like reference model/SB, drivers and monitors. Team player with excellent interaction skills. Perl/shell scripting is a good to have. ...

    $15 - $24 / hr
    加封 保密协议
    $15 - $24 / hr
    20 个竞标