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Design of floating point adder, subtractor, multiplier and divider using reversible vedic logic and improvement using Gate Diffusion Injection logic

₹12500-37500 INR

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已发布超过 7 年前

₹12500-37500 INR

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Design of floating point adder/subtractor in Verilog Improvement of power consumption using Vedic Maths and GDI logic Design of floating point multiplier using Verilog Improvement using Vedic Maths and GDI logic Design of floating point divider using Verilog Improvement using Vedic Maths and GDI logic
项目 ID: 12533822

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7威客以平均价₹31,926 INR来参与此工作竞价
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Dear sir I have more than 9 years experience in digital design using verilog, and i totally understand the vedic multiplication, please message me so that we can discuss Best regards
₹38,888 INR 在10天之内
5.0 (269条评论)
7.5
7.5
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Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
₹27,777 INR 在10天之内
4.9 (45条评论)
5.4
5.4
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hi very good afternoon...! Done kind of work your expecting from freelancer,lets chat and share more info. and I am available at any point of time, expecting positive response from end.
₹35,555 INR 在9天之内
0.0 (0条评论)
0.0
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Hello, good to see another serious job posting... :) I could absolutely help you with your Verilog tasks. I have a master's degree in electrical engineering. I am available to start the workimmediately ! I am a German engineer and I can assure you several things: 1. I work very fast and well organized 2. My work is accurate, customer satisfaction is very important for me 3. I always put my full energy and attention into every project that I take on and do not get flustered by problems or issue. 4. I can ensure quality communication in regards to the project I would be happy to discuss with your more details. Let's build success! Best Regards, Tobias Missal
₹36,260 INR 在10天之内
0.0 (0条评论)
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0.0
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Hi, I am Gopal. I have an 3+ years of experience in Design and verification. I have implemented floating point unit earlier using Logarithmic Multiplier. I can create this one too. If you are interested, we can start this project ASAP. I will wait for your response. Best regards, Gopal
₹17,777 INR 在9天之内
0.0 (0条评论)
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