C++ Application to Spartan 6 FPGA Dev. Board (FFT/FIR, COFDM, RF, Linux)

The objective of this project is to port the functionality of an existing open source C++ command line application. This is usually run on linux (x86) to produce COFDM complex (interlaced) samples for subsequent IQ modulaton to produce a DAB/DMB compliant signal. It seems faintly silly to continue running this application on a power hungry (and physically big!) PC, so it is desirable to replicate the functionality of this application in a Xilinx® Spartan®-6 FPGA LX9 MicroBoard. The details of the target device can be seen here: [login to view URL] Not all of the functionality of odr-dabmod ([login to view URL]) is required (the zmq input over ethernet for example) and this will be detailed if there are sensible bids. As well as familiarity with FPGA IDEs, it is desirable to have an understanding of RF techniques. More important is knowing how to efficiently perform FFT in FPGA! Some options for the data output format will be explored and agreed before the project is awarded as as some things can potentially be left out, and there is also the I/O of the board which might open up other options. It is envisaged that the FPGA will need to run a Linux core for handling most of the functionality in/handle network communications etc and an additional sub-device for carrying out the FFT functions to generate the modulation samples, and FIR filtering. The ETSI standard below EN.300 401 describes the application, and Chapter 14 onwards details what odr-dabmod is doing. [login to view URL] Thats probably all that needs to be said for now. This is an interesting (and dare I say, fun!) project for the right candidate. I'd tolerate suggestions to achieve this objective some other way, so if you have another way to do this - let's have a chat about it! The deliverables from this project are self-explanatory: [login to view URL] that is commented such that other devs can follow it, as they will further work on the output options as part of this open source project. 2. Demonstrably working code for the FPGA. A test with a USRP (B100 or 200) Software Defined Radio will be used to verify the functionality of the object code. Bids both above and below the project band will be considered, but please bear in mind that it is a 'not for profit project', so I am not looking for a commercial solution - just something that works!