Piccolo cipher implementation in VHDL/Cryptography - 05/08/2018 19:27 EDT

已完成 已发布的 5 年前 货到付款
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Hi there!

I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be found in the pages between 342 to 355.

The code has already been developed but I'm unable to procure the final result. ( As i can see that the individual modules are successfully executing but the final result doesn't appear which you can help me in debugging the same )

Note: Problem in debugging the code

Language used : VHDL

电气工程 工程 FPGA Verilog / VHDL

项目ID: #17513158

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7个方案 远程项目 活跃的5 年前

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MUhammadt429i

I have long experience with FPGA and VHDL . I work with both intel and Xilinx FPGAs , SoC and SOPC. I use Quartus II and Vivado IDEs accordingly. I test timing compliance through timing analysis . I deliver tested 更多

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有7名威客正在参与此工作的竞标,均价€141/小时

ahmedmohamed85

Dear sir I have more than 10 years experience in digital design using vhdl, please check my profile also please message me so that we can discuss Best regards

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vikramrekapalli

Hi am vikram from hyderabad. Having 12 years experience in VLSI, i can easily debug and help you in the way as you expected.

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NienYi07

Expert in HDL and 100% guaranteed delivery and satisfaction. Hardware designer in silicon valley with experience implementing VHDL code on hardware and debugging complex systems.

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