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Design a simple CPU using Verilog - Repost - open to bidding

$30-250 USD

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已发布超过 10 年前

$30-250 USD

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This is a school assignment that requires us to design a simple 5-stage pipeline CPU. It should be able to detect data hazard and insert bubbles into the pipeline accordingly. This is the description of the assignment: [login to view URL]
项目 ID: 5382401

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活跃10 年前

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Dear sir, I was waiting you online to discuss the work, please tell me at what time you would be online, I am very interested in your project and i want to do it, please accept me at skype, i send you invitation
$277 USD 在15天之内
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Hello, I have a good experience in VHDL and embedded system design. I wish to bid for this project. I am ready to start immediately. Thanks Vinod
$155 USD 在20天之内
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5.7
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NOTE: MY PRICE IS HIGH, BUT I GUARANTEE 110% SATISFACTION OF THE CLIENTS. IF YOU CAN'T AFFORD THE PRICE IN MY BID THEN PLEASE DON'T WASTE YOUR TIME READING FURTHER, THANKS. Dear Hiring Manager, I am a professional electrical engineer and have made several projects (more than 150) for local and international clients and have also completed 36 reviews with excellent ratings here in freelancer.com. For the processor, this processor I had also implemented during my semester project of (Digital Logic Design) using the software Xilinx ISE. I can do both parts of your assignment (Phase 1 and Phase 2) but my bid is only for phase 1. For phase 2, I will charge you extra $200 (total $600 for both phases). If you are really interested in getting your work done, then contact me and discuss the details with me. Thanks. Best Regards, Faraz Ahmad
$400 USD 在20天之内
4.9 (28条评论)
5.4
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Hi there I have something like that on my computer but it's not finished just because I didn't have any time. I can give you my code and you can hire someone else to complete my job for a small price.
$45 USD 在0天之内
5.0 (4条评论)
4.3
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Hello! I am an Electronics and Communication undergraduate with extensive experience in digital system design in Verilog. I have already designed my own CPU using pipelining and superscalar architecture in order to demonstrate the performance edge of parallel implementation of a CPU over sequential implementation. Your problem definition is quite simple and can be completed in a span of less than three days. I have gone through the document link you have provided and I think I can do it easily. I am under your budget and fulfill all your specs mentioned, so kindly consider hiring me.
$155 USD 在3天之内
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LIBYA的国旗
asd, Libya
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