Find Jobs
Hire Freelancers

FPGA Edge Detection Algorithm Comparison

₹600-1500 INR

进行中
已发布28 天前

₹600-1500 INR

货到付款
I'm in need of an FPGA expert with experience in VIVADO, to implement different edge detection algorithms, including Canny and Sobel, for the purpose of comparing their performance. Key Requirements: - Implement edge detection algorithms in VIVADO: The primary task is to develop and deploy edge detection algorithms in an FPGA, with a focus on Canny and Sobel techniques. - Algorithm Performance Evaluation: The main goal of this project is to compare the efficacy and efficiency of different edge detection algorithms, so you should have a strong background in image processing and be able to provide a thorough analysis of their performance. - Knowledge of other edge detection algorithms: While Canny and Sobel are the main focus, knowledge of other edge detection algorithms such as Laplacian would be advantageous. Ideal Skills and Experience: - Proficiency in FPGA programming and development using VIVADO. - Strong background in image processing and algorithm development. - Prior experience in implementing edge detection algorithms. - Experience in algorithm comparison and evaluation would be a plus. The ideal candidate should have excellent communication skills and be able to provide regular updates on the progress of the project. The final deliverable should include a detailed performance analysis of the implemented algorithms. CODE FOR CANNY IS ALREADY DONE JUST NEED TO INTEGRATE OTHER ALGORITHMS
项目 ID: 38030471

关于此项目

2提案
远程项目
活跃27 天前

想赚点钱吗?

在Freelancer上竞价的好处

设定您的预算和时间范围
为您的工作获得报酬
简要概述您的提案
免费注册和竞标工作
颁发给:
用户头像
Hello Sir, I hope you're doing well today. I want to express my interest in this task, I'm eager to learn whatever it takes to complete a job and have all the experience mentioned in the description. Throughout my experience in digital IC design, I'm excellent with using Verilog, SystemVerilog, and VHDL, and newly to Chisel-based Scala HDL, I worked on many projects like microprocessors, Crypto cores, DSP Cores, Memory Design, and bus design. Also, I worked with many FPGA projects including Zedboard ultra-scale, PYNQ-Z2, DE0, DE1 SoCs, and Basys-3, with design and power optimization techniques using Xilinx VIVADO and Intel Quartus prime. Finally, I worked with many digital IC verification projects using SystemVerilog - UVM. You can take a look at my previous projects on my GitHub repos =================================> [login to view URL] I look forward to discussing more about this task and also looking forward to sharing my knowledge with you. Sincelery, Ahmed Osama.
₹1,000 INR 在5天之内
0.0 (0条评论)
0.0
0.0
2威客以平均价₹10,500 INR来参与此工作竞价
用户头像
I am an FPGA expert with more than 8 years of experience in designing various digital systems using VHDL/Verilog. I will be able to implement various edge detection algorithms using Vivado. I have previous experience on edge detection algorithms and its implementation. Lets start the project as soon as possible after discussing thorough requirements through messages.
₹20,000 INR 在7天之内
4.8 (19条评论)
5.4
5.4

关于客户

INDIA的国旗
Mumbai, India
5.0
2
付款方式已验证
会员自4月 4, 2022起

客户认证

谢谢!我们已通过电子邮件向您发送了索取免费积分的链接。
发送电子邮件时出现问题。请再试一次。
已注册用户 发布工作总数
Freelancer ® is a registered Trademark of Freelancer Technology Pty Limited (ACN 142 189 759)
Copyright © 2024 Freelancer Technology Pty Limited (ACN 142 189 759)
加载预览
授予地理位置权限。
您的登录会话已过期而且您已经登出,请再次登录。